NXP Semiconductors

Physical Design Methodology Lead

Noida · Work from office Experience not set Posted 1 mo ago Sourced by hiARed
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About the role

Role Overview We are seeking a senior-level Flow and Methodology Engineer to lead backend design automation for advanced process node SoC and ASIC implementation. This role focuses on enabling robust, scalable, and production-ready RTL-to-GDS flows across synthesis, floorplanning, place and route, clock tree synthesis, static timing analysis, power grid implementation, extraction, physical verification, and signoff closure. The ideal candidate will combine deep technical expertise in physical design methodology with the ability to drive initiatives from concept definition through validation, deployment, and sustained production support. Key Responsibilities • Own, develop, and continuously improve backend RTL-to-GDS implementation flows for advanced process nodes, with emphasis on quality of results, scalability, runtime, and designer productivity. • Drive methodology development across place and route, CTS, timing closure, congestion analysis, ECO implementation, power grid design, IR/EM analysis, extraction, and signoff readiness. • Partner with design, architecture, DFT, verification, timing, low-power, package, foundry, and signoff teams to ensure flows meet tapeout requirements for complex SoC and IP programs. • Lead initiatives from concept and feasibility assessment through prototype development, benchmarking, validation, documentation, deployment, training, and produ

Skills

Static timing analysisElectrical engineeringMachine learningShell scriptingPhysical designOperations researchArchitectureProblem solving

Role details

Employment type
Full-time
Openings
1

About NXP Semiconductors

Dutch company


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