Senior CAD Engineer – Physical Design Signoff

About the role

Job Details: Job Description: We are looking for a highly motivated Senior Physical Design Signoff Automation Engineer to develop and deploy signoff methodologies and automation solutions for advanced CPU and SoC designs. The candidate will work closely with Physical Design, Timing, Power, Reliability, and CAD teams to improve signoff quality, productivity, and turnaround time. The ideal candidate possesses deep expertise in Parasitic Extraction, Static Timing Analysis (STA), Electrical Rule Checking (ERC), and Power Integrity signoff, along with strong programming and automation skills. Key Responsibilities Develop and enhance automation solutions for Physical Design signoff flows, including: RC Extraction Static Timing Analysis (STA) Electrical Rule Checking (ERC) Power Integrity (IR Drop/EM) Signal Integrity (SI) Create scalable automation frameworks to reduce signoff turnaround time and improve engineering productivity. Develop scripts and tools to automate signoff checks, debugging, reporting, and data analysis. Analyze and resolve timing, extraction, ERC, and power signoff issues in collaboration with design teams. Drive methodology improvements to improve signoff convergence, quality, and correlation across implementation stages. Partner with EDA vendors and internal CAD teams to evaluate and deploy new signoff capabilities. Build dashboards and reporting infrastructu

Skills

Role details

Employment type

Full-time

Openings

1

About Intel

American multinational technology company

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